Embodiments of the inventive concepts disclosed herein relate generally to the field of phase locked loops (PLLs). More particularly, embodiments of the inventive concepts disclosed herein relate to PLLs for multiple systems, the systems requiring input signals that are in phase with each other.
PLLs are control systems (e.g., circuits, digital systems, etc.) where an input signal is aligned in frequency to an output signal based on a relative difference of phase between the input signal and the output signal, i.e., by keeping the phase between the input signal and the output signal locked. The PLL includes a loop by which the output of the PLL can be fed back into the PLL to be compared with the input to the PLL. PLLs can be utilized to step up or step down frequencies. Many systems, specifically in aircraft, rely on a signal generated by a PLL. However, while PLLs lock phase, they do not necessarily align phase nor do multiple PLLs align phase relative to each other. Therefore, for an aircraft, there may be multiple phase sensitive systems each receiving a signal generated at a particular frequency (or frequencies) but all out of phase. This can cause performance issues with phase sensitive systems.